RHESO.TECH
Digital IC Design Engineer Technical Leader (W/M)
Job Location
Paris, France
Job Description
Digital IC Design Engineer Technical Leader (W/M)
* Contract Type: Full-time (CDI)
* Location: Paris
* Ref: 1685
* Contact: ******************
Recruiting Company:
French fabless semiconductor manufacturer specialized in the design and marketing of highly integrated, mixed-signal semiconductor products for markets demanding wideband and low power analog-to-digital, digital-to-analog conversion.
Role:
The Design Team is looking to expand and seeks a dynamic and experienced digital designer who will contribute to the chip/block level architecture definition and implementation. In this role, you will technically drive digital work-packages to deliver a state-of-the-art Integrated Circuit (IC) in deep submicron CMOS technology.
Responsibilities:
* Lead and support digital design work-packages from RTL to GDSII.
* Collaborate with project technical leaders to define IC architecture and verification methodology.
* Participate in customer discussions to define product architecture and specification definition.
* Drive architecture definition and specifications for digital parts under his/her responsibilities.
* Teamwork to successfully design a state-of-the-art IC and evaluate its lab fabrication.
* Contribute to design and verification methodology at chip and digital sub-blocks level.
* Define test strategies of the digital part(s) and drive its implementation with the front-end team.
* Lead design reviews and write documentation in line with company QA policy.
* Define the floorplan strategy to meet the stringent performance requirements working with the back-end team.
Requirements:
* You hold an MSc or PhD in Electrical Engineering or equivalent, with over 10 years of chip-level and circuit-level architecture definition and RTL design and verification experience.
* You have a solid background in full digital IC design flow from RTL to GDSII.
* You possess extensive experience in digital electronics, signal processing and IC project and technical leader role.
* You are proficient in Cadence or Synopsys RTL with a comprehensive understanding of its design flows and have experience designing high-speed, digital signal processing blocks with multi-power/clock domain constraints.
* You demonstrate creativity, proactivity, good analytical and problem-solving skills.
* Your previous experience in designing A/D converters, D/A converters, and/or RF transceivers is advantageous.
* Fluency in English and the ability to work well in a team with a critical attitude are essential.
Education:
BAC+5, Master's Degree, Engineering School
RHESO.TECH, a specialized recruitment agency
https://www.rheso.tech/
Key words: Digital, IC, Design, Chip, CMOS, GDSII, RTL, Cadence Specter, A/D converter, D/A converter, RF transceiver
Location: Paris, FR
Posted Date: 11/16/2024
* Contract Type: Full-time (CDI)
* Location: Paris
* Ref: 1685
* Contact: ******************
Recruiting Company:
French fabless semiconductor manufacturer specialized in the design and marketing of highly integrated, mixed-signal semiconductor products for markets demanding wideband and low power analog-to-digital, digital-to-analog conversion.
Role:
The Design Team is looking to expand and seeks a dynamic and experienced digital designer who will contribute to the chip/block level architecture definition and implementation. In this role, you will technically drive digital work-packages to deliver a state-of-the-art Integrated Circuit (IC) in deep submicron CMOS technology.
Responsibilities:
* Lead and support digital design work-packages from RTL to GDSII.
* Collaborate with project technical leaders to define IC architecture and verification methodology.
* Participate in customer discussions to define product architecture and specification definition.
* Drive architecture definition and specifications for digital parts under his/her responsibilities.
* Teamwork to successfully design a state-of-the-art IC and evaluate its lab fabrication.
* Contribute to design and verification methodology at chip and digital sub-blocks level.
* Define test strategies of the digital part(s) and drive its implementation with the front-end team.
* Lead design reviews and write documentation in line with company QA policy.
* Define the floorplan strategy to meet the stringent performance requirements working with the back-end team.
Requirements:
* You hold an MSc or PhD in Electrical Engineering or equivalent, with over 10 years of chip-level and circuit-level architecture definition and RTL design and verification experience.
* You have a solid background in full digital IC design flow from RTL to GDSII.
* You possess extensive experience in digital electronics, signal processing and IC project and technical leader role.
* You are proficient in Cadence or Synopsys RTL with a comprehensive understanding of its design flows and have experience designing high-speed, digital signal processing blocks with multi-power/clock domain constraints.
* You demonstrate creativity, proactivity, good analytical and problem-solving skills.
* Your previous experience in designing A/D converters, D/A converters, and/or RF transceivers is advantageous.
* Fluency in English and the ability to work well in a team with a critical attitude are essential.
Education:
BAC+5, Master's Degree, Engineering School
RHESO.TECH, a specialized recruitment agency
https://www.rheso.tech/
Key words: Digital, IC, Design, Chip, CMOS, GDSII, RTL, Cadence Specter, A/D converter, D/A converter, RF transceiver
Location: Paris, FR
Posted Date: 11/16/2024
Contact Information
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