ASIC RTL Engineer

Are you passionate about working with a growing company offering cutting-edge engineering design services in VLSI, we'd love to hear from you. About the Role : We are seeking a talented ASIC RTL Design Engineer to join our team. As an RTL Design Engineer, you will be responsible for designing, implementing, and verifying complex digital circuits. You will work closely with a team of engineers to deliver high-quality, high-performance VLSI designs. LeadSoc Technologies is hiring for ASIC RTL Professionals. Experience : 4 years to 8 years. Location : Bangalore. Notice Period : Immediate to 30 days. Mode of work : Hybrid. Client : ODC. - RTL microarchitecture. - RTL design Implementation. Key Responsibilities : RTL Design : Design and implement complex digital circuits using Verilog/VHDL. Microarchitecture : Develop and analyze microarchitecture specifications. Synthesis and STA : Perform synthesis and static timing analysis to optimize designs. Verification : Develop and execute testbench environments to verify the correctness of RTL designs. Debugging : Identify and troubleshoot design issues using simulation and debug tools. Collaboration : Work closely with cross-functional teams, including verification, physical design, and software teams. Required Skills and Experience : 4-8 years of experience in ASIC RTL design. - Strong understanding of digital design fundamentals, including logic design, timing analysis, and power optimization. - Proficiency in Verilog/VHDL. Experience with synthesis and static timing analysis tools (Synopsys, Cadence). - Experience with simulation tools (ModelSim, VCS). - Knowledge of scripting languages (Perl, Python, TCL). - Strong problem-solving and debugging skills. - Good communication and teamwork skills. - Design and implement complex digital circuits using Verilog/VHDL. - Ensure designs meet performance, power, and area targets. - Adhere to design guidelines and coding standards - Collaborate with system architects to develop and refine microarchitecture specifications - Analyze microarchitecture trade-offs to optimize design. - Perform synthesis and static timing analysis to optimize designs for timing closure. - Work with physical design team to resolve timing violations and optimize power consumption. - Develop and execute comprehensive verification testbenches. - Debug design issues using simulation and formal verification tools. - Ensure high-quality and reliable designs through rigorous verification. - Effectively collaborate with cross-functional teams, including verification, physical design, and software teams. - Communicate clearly and concisely to share technical information and progress updates. Preferred Skills : - Experience with low-power design techniques. Knowledge of formal verification. - Experience with FPGA prototyping. (ref:hirist.tech)

Location: bangalore, IN

Posted Date: 11/27/2024