FY25 Graduate Digital Design Engineer

FY25 Graduate Digital Design Engineer Apply locations France, Sophia-Antipolis time type Full time posted on Posted 9 Days Ago job requisition id R244579 Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare. ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future. The Team: The Personal Electronics Solutions (PES) Team is primarily focused on PMIC and hybrid mixed signal / power developments, for High-End / High-Volume electronic devices, such as Smartphones, Tablets and Consumer Accessories. PES Sophia-Antipolis France Team is expanding its focus in Power Solutions, across a broad range of IC engineering profiles and levels of experience, including Analog Designer, Digital Designer, Mixed-Signal Designer, Verification Engineer, Validation Engineer and Layout Designer. The Position: Analog Devices, Inc. is looking for an Engineer to join our Team. The candidate will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations. The candidate will join a team of Analog, Digital, Mixed-Signal CMOS designers, Mask Layout designers, Verification and Validation engineers, Algorithm and Software developers, Packaging and Test engineers, implementing PMIC state of the art. The candidate will be involved in product developments, from definition to production. Responsibilities: Power IP Development Execute based on IP Specification Improve Team Methodologies Power Management IC Development Execute on PMIC design, pre-silicon verification and post-silicon validation Provide support to physical design layout team Technical Customer Interface Engagement Participate in customer engagements, in support of technical feasibility IC development weekly meetings Human Resources Enable a culture of continuous learning and improvement Minimum Qualifications: Master’s degree in Electrical Engineering, Computer Engineering, Software Engineering, or related fields. Required Qualifications & Experience: Digital system knowledge Good technical and analytical background with good problem-solving skills Great team worker with multi-discipline team HDL programming languages (Verilog / SystemVerilog / VHDL) RISCV Core knowledge and familiar with FPGA implementation Good written and verbal communication in English Preferred Qualifications: Proficient with Cadence Suite Scripting and Programming languages Timing Constraints, Static Timing Analysis (STA), Logical Equivalency Checking (LEC), Gate Level Simulation (GLS) Design For Test (DFT), SCAN Insertion, Automatic Test Pattern Generation (ATPG) LI-CO1 For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. J-18808-Ljbffr

Location: Antibes, FR

Posted Date: 1/10/2025